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CYTUVA

Development of time processing algorithms

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Contact Information

  • Alberto Izquierdo Fuente
  • Campus Miguel Delibes, Paseo Belén, 15
    Valladolid, Valladolid (47011) - Lab. 2L026 ETSIT
  • Send email
  • 983185801
  • 983423667
  • http://gpa.tel.uva.es

Basic Information

  • UniversityUniversidad de Valladolid
  • Center
  • DepartmentSignal Theory and Communications and Telematics Engineering
  • Investigation GroupArray Processing Group (GPA)


Description

Implementation of algorithms based on FPGA (Field Progammable Gate Array) architectures for real time processing.


Other information

Number of researchers:

3

Development status:

In research and development phase

Intellectual Property Rights:

Susceptible de patente

Differentiation in the market:

Quality

Applicability of technology:

Yes

Companies and markets:

The implementation of processing algorithms through real time FPGA architectures has a very horizontal applicability with interest in various fields.

Advantages:

Flexibility in production and development time reduction.

Additional Information:

Group members, Alberto and Juan José, are development engineers with Labview certificate.

UNESCO Code:

2201 - Acoustics

Other members:

Juan José Villacorta Calvo
Lara del Val Puente

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